By Benoit Dufort
Analog try sign new release utilizing Periodic SigmaDelta-Encoded Data Streams offers a brand new strategy to generate top of the range analog indications with low complexity. The conception of periodic SigmaDelta-encoded bitstreams is gifted alongside with a suite of empirical tables to aid pick out the fitting parameters of a bitstream. An optimization approach is usually defined to aid pick out a piece series with the specified attributes. a wide number of indications may be generated utilizing this technique. Silicon implementation matters are mentioned with a selected emphasis on quarter overhead and simplicity of layout. One FPGA circuit and 3 various silicon implementations are provided besides experimental effects. it really is proven that straightforward designs are able to producing very excessive precision signals-on-chip. The process is additional prolonged to multi-bit sign iteration the place it's proven how one can elevate the functionality of arbitrary waveform, turbines normally present in earlier and present-day mixed-signal testers. No variations are required, merely the numbers in reminiscence are replaced. 3 varied calibration options to minimize the consequences of the AWG's non-linearities also are brought, including helping experimental facts.
the main target of this article is to explain an area-efficient strategy for analog sign iteration utilizing SigmaDelta-encoded facts circulation. The major features of the approach are:
- excessive caliber signs (SFDR of a hundred and ten dB observed);
- huge number of signs generated;
- Bitstreams simply acquired with a quick optimization software;
- reliable frequency solution, appropriate with coherent sampling;
- uncomplicated and speedy undefined implementation;
- regularly electronic, other than an simply testable 1-bit DAC and doubtless a reconstruction filter out;
- reminiscence already on hand on-chip could be reused, lowering sector overhead;
- Designs will be integrated into current CAD instruments;
- excessive frequency iteration.
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Additional resources for Analog Test Signal Generation Using Periodic ΣΔ-Encoded Data Streams
II ...... •• . • •• ~ • 1Wl. 1 Input Signal The method begins by defining the attributes of the desired analog signal and to mathematically represent this signal by its samples x(n). 1 modulator to convert this signal into a single-bit stream that can then be used by the Ie memory to produce a corresponding analog signal. Owing to the periodic nature of this signal generation method, the frequencies of the input signal should obey the rules of coherent sampling given by Eq. 20). 1 modulator, which will vary with the type and order of the modulator.
The phase accumulator enables the user to scan the ROM with different increments to change the frequency as shown in Fig. 2-10. --- - .. -----_ .. I I • "of. 1) and the output signal can consist of the following frequency components , f out M = 1,2,3, ... 3) where A max is the maximum amplitude. In order to transform the digital words into an analog signal, a multi-bit DAC is needed. The ultimate precision of the synthesizer will be dictated by this DAC. Using multi-bit DACs in a mixed signal test strategy should be avoided since the DAC itself needs to be tested.
The digital output is thus composed of the analog sinewave plus quantization noise. The amount of noise present depends on the number of bits in the quantizer. e. spread evenly across all frequencies. This is not always a valid assumption but for many practical situations it is sufficient. For example, a II-bit quantizer is excited by a sinusoidal signal having an amplitude of unity and a frequency of 250 kHz. The sampling rate Fs is set to I MHz. The corresponding power spectral density (PSD) of the output is shown in Fig.