By Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins
This e-book offers architectural and circuit innovations for instant transceivers to accomplish multistandard and low-voltage compliance. It offers an updated survey and special research of the state of the art transceivers for contemporary unmarried- and multi-purpose instant communique structures. The publication comprises accomplished research and layout of multimode reconfigurable receivers and transmitters for a good multistandard compliance.
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Extra resources for Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers (Analog Circuits and Signal Processing)
4] obviates using offchip filters. As shown in Figure 2-3, the desired channel is translated directly to dc through two channels (I and Q) that operate with a 90°-phase shift. Again, the image is eliminated through signal cancellation rather than filtering. Since the image is the desired channel itself, the demanded I/Q matching is practically achievable for most applications. , dc offset and 1/f noise. With them superimposed on the desired channel, a substantial degradation in signal-to-noise ratio (SNR) or completely desensitizing the system due to a large baseband gain may result.
65] P. 18 μm CMOS,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 86–87, Feb. 2002. 66] G. , “A Direct-Conversion Single-Chip Radio-Modem for Bluetooth,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 88–89, Feb. 2002. 67] M. 4 GHz RF Transceiver with Digital Channel-Selection Filter for Bluetooth,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 93–94, Feb. 2002.
A successive switching technique implemented in the dc-offset cancellation loop is to improve the settling time in the RX gain adjustment. Chapter 2: Transceiver Architecture Selection Figure 2-14. R. 11a/b/g transceiver Figure 2-15. Z. 11a/b/g transceiver 29 30 Analog-Baseband Architectures and Circuits T. Rühlicke et al. 11a/g) to facilitate, mainly, the dc-offset cancellation. In the TX, two-step-up is kept in use to fulfill the RX–TX turn-around time, whereas it is direct-up for b and g. No on-chip power amplifier is integrated.